Amd Epyc 7543 vulnerabilities, page 5
90 vulnerabilities
Known vulnerabilities in Amd Epyc 7543, newest first, with CVSS severity, EPSS, KEV listings, ransomware use and the affected versions.
CVE-2023-20591amdepyc_7203_firmware+64
EPSS score0.30%
Improper re-initialization of IOMMU during the DRTM event
may permit an untrusted platform configuration to persist, allowing an attacker
to read or modify hypervisor memory, potentially resulting in loss of
confidentiality, integrity, and availability.CVE-2023-20569amd1st gen amd epyc™ processors+338EPSS score7.30%
A side channel vulnerability on some of the AMD CPUs may allow an attacker to influence the return address prediction. This may result in speculative execution at an attacker-controlled address, potentially leading to information disclosure.CVE-2023-20531amd2nd gen epyc+51EPSS score0.63%
Insufficient bound checks in the SMU may allow an attacker to update the SRAM from/to address space to an invalid value potentially resulting in a denial of service.CVE-2023-20526amd1st gen amd epyc™ processors+79EPSS score0.31%
Insufficient input validation in the ASP Bootloader may enable a privileged attacker with physical access to expose the contents of ASP memory potentially leading to a loss of confidentiality.CVE-2023-20573amd3rd gen amd epyc™ processors+66EPSS score0.29%
A privileged attacker
can prevent delivery of debug exceptions to SEV-SNP guests potentially
resulting in guests not receiving expected debug information.CVE-2023-20575amd1st gen amd epyc™ processors+91EPSS score0.80%
A potential power side-channel vulnerability in some AMD processors may allow an authenticated attacker to use the power reporting functionality to monitor a program’s execution inside an AMD SEV VM potentially resulting in a leak of sensitive information.CVE-2023-20525amd2nd gen epyc+51EPSS score0.61%
Insufficient syscall input validation in the ASP Bootloader may allow a privileged attacker to read memory outside the bounds of a mapped register potentially leading to a denial of service.CVE-2023-31347amd3rd gen amd epyc™ processors+64EPSS score0.46%
Due to a code bug in
Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a
guest to observe an incorrect TSC when Secure TSC is enabled potentially
resulting in a loss of guest integrity.CVE-2023-31346amd3rd gen amd epyc™ processors+87EPSS score0.31%
Failure to initialize
memory in SEV Firmware may allow a privileged attacker to access stale data
from other guests.CVE-2023-31355amd3rd gen amd epyc™ processors+89EPSS score0.44%
Improper restriction of write operations in SNP firmware could allow a malicious hypervisor to overwrite a guest's UMC seed potentially allowing reading of memory from a decommissioned guest.