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CVE-2024-30212: microchip mplab® harmony 3 core module Integer Overflow or Wraparound

CVSS: 7.0v4.0HighDeferred
Published 28-05-2024Last modified 13-02-2025

Vulnerability summary

CVE-2024-30212 is a high (CVSS 7.0) Integer Overflow or Wraparound vulnerability in microchip mplab® harmony 3 core module. EPSS estimates a 0.57% chance of exploitation in the next 30 days, higher than 46% of scored vulnerabilities.

Overall risk
28/100
0100
Medium · default modelHow is this calculated?
CVSS score
7.0/10
010
High · v4.0 (CVE.org)
EPSS score
0.57%
0%100%
Low · 0.00 pp in 30 days
KEVNot listedIn no KEV catalog
RansomwareNone recordedNo known use recorded
Public exploits0No public exploits recorded

Timeline

  1. 28-05-2024
    PublishedVulnerability first disclosed.
  2. 13-02-2025
    Last modifiedVulnerability information updated.

Description

If a SCSI READ(10) command is initiated via USB using the largest LBA (0xFFFFFFFF) with it's default block size of 512 and a count of 1, the first 512 byte of the 0x80000000 memory area is returned to the user. If the block count is increased, the full RAM can be exposed. The same method works to write to this memory area. If RAM contains pointers, those can be - depending on the application - overwritten to return data from any other offset including Progam and Boot Flash.

CVSS metrics

2 scores · 2 sources · 1 version

EPSS trend

Probability

0.57%

Chance of exploitation in the next 30 days

Percentile

46%

Versus all other CVEs

30-day change

0.00 pp

From 0.57% on 20-09-2026

20-09-202620-10-2026
EPSS score
0.57%

Known exploited

Compare KEV catalogs

Not in any of the 3 tracked catalogs.

Public exploits

0 found

No public exploits indexed.

Weaknesses

CWE · root cause

Affected systems

Microchip1 product

1 vendor · 1 product

References

3 links